EDN

FPGA design tool bypasses VHDL coding

CoDeveloper, a C language design tool for Altera Nios-based and Xilinx MicroBlaze-based programmable platforms, allows creation of a complete hardware/software application with no need to write VHDL ...
Semiconductor Engineering

FPGA Design And Verification in Mechatronic Applications

The biggest challenge in using FPGA devices may be one of methodology. FPGA designers are familiar with HDL-based requirements-driven design methodologies for digital electronics. But how can ...
Semiconductor Engineering

FPGA VHDL Verification

This is actually possible – and with an average efficiency improvement of 20% to 50% for medium to high complexity FPGAs. Less for data path oriented designs and more for control or protocol oriented ...
Electronic Design

Facing Up To Today’s FPGA Verification Challenges

Today it is not unusual for FPGA users to have to deal with more than one language in their designs. At earlier stages of the design development it may be necessary to interface HDL simulation with ...
mccormick.northwestern.edu

COMP_ENG 355: ASIC and FPGA Design

This course will introduce students to practical design methodologies for developing applications for FPGAs and ASICs. You will learn the fundamentals for FPGA and ASIC design through software coding ...
EDN

Building FPGA-based digital downconverters with graphical design tools

High bandwidth digital downconverters (DDCs) are critical components in many high-performance systems, including receivers of modulated communications, medical imaging devices, and low-level RF ...
CU Boulder News & Events

ECEA 5361 Hardware Description Languages for FPGA Design

This course will give you the foundation for using Hardware Description Languages, specifically VHDL and Verilog for Logic Design. You will learn the history of both VHDL and Verilog and how to use ...
Design-Reuse

Synopsys Announces FPGA Synthesis Support for Xilinx's Newest ISE Design Suite 13

Designers using Synopsys' Synplify Pro® and Synplify® Premier FPGA synthesis software, in conjunction with Xilinx's latest ISE Design Suite 13, can achieve high design performance for Virtex®-7, ...
TechRepublic

Design and Verification of VHDL Code for FPGA Based Slave VME Interface Logic

Versa Module Europa (VME) bus is used in various applications in order to ensure safety and security. VME64x based Real Time Computer (RTC) system with various types of Input /Output (I/O) hardware ...
Electronic Design

Design Tool Streamlines SoC FPGA Application Creation

Xilinx’s SDSoC represents a major shift in support for SoC FPGAs. It opens FPGA development to software developers without requiring a major investment in time and effort to utilize the hardware ...
Design-Reuse

Xilinx Virtex-7 HT Devices Enable 100-400Gbps Applications and Beyond in a Single FPGA for Next Generation Communication Systems

Up To Sixteen 28Gbps Serial Transceivers in New FPGA for Industry's Highest Bandwidth Line Cards Supporting Major High-Speed Serial, Optical and Backplane Protocols SAN JOSE, Calif., Nov. 17, 2010 -- ...